你的理專跟你推銷AT1債卷?

好家在我的理專幫我買的是瑞信人民幣債券

你的理專是國泰系統
你買了AT1
失敬！失敬！聽說不夠大戶還不會被推上去宰肥羊

其實我想問的是：國外怎麼搞是一回事，國泰金你們家都自己都不敢買的商品，卻用力擺在架上賣給客戶，賺取佣金，出了事還裝無辜，裝路人玩路見不平拔刀相助
嗯！專業、良心

你想太多了

我沒有買瑞信 但是有買其他的公司債

但是我看到瑞信的做法

讓我有點嚇到

更何況瑞信AT1 我的銀行沒有賣

沒有 我是看到瑞信這樣幹

怕我買的其他債券會不會有同樣情況

所謂同樣情況是指公司倒掉時低順位債券會不會血本無歸嗎? 這當然是有可能, 但會不會就是遊戲所在了. 瑞信其實臭很久了, 但一定會倒嗎? 什麼時候倒? 事先哪有人會知道.

我沒有買低順位債券

中信不賣低順位債券

M01的Kevin、Foestry，以及王大衛（臉書）都關注永豐金！
而且(2890) 永豐金 本益比河流圖都在15以下，所以蠻不錯！
https://goodinfo.tw/tw/ShowK_ChartF...90&CHT_CAT=WEEK

本主題系列文將以 Node.js 及 Nest Framework 實作範例，針對臺灣股票市場，說明如何收集、運用公開資料進行股市分析，並結合券商 API 監控盤中即時行情、執行自動化下單，打造屬於自己的投資系統！
https://ithelp.ithome.com.tw/users/...50/ironman/5145

驅動 IC 價格漸落底，第二季動能續
https://technews.tw/2023/03/28/driv...etic-energy-q2/

我之前有研究過AI對晶片之影響。不過，我是直接去看Arm、Intel、AMD、三星等四家公司發展方向。

目前AI模型極為需要硬體資源，所以微軟等各公司會讓端點裝置（電腦、手機、平板、物聯網各端點、無人車/船/飛機、、）都來分擔AI運算！

從下文的Sve2方向來看，Arm就是想吃下伺服器、物聯網各端點、電腦平板手機等所有市場！

三星與AMD已經合作多年在搞“記憶體中運算”！這是讓記憶體去分擔部分CPU工作。

PS：
Armv9較難理解的是SVE2！

# SVE2讓開發人員編寫和構建一次程式，就能用在不同AArch64硬體之上。
《轉貼》Why use SVE2?
The SVE2 design concept enables developers to write and build software once, then run the same binaries on different AArch64 hardware with various SVE2 vector length implementations, as the name suggests. Since some laptop and mobile devices have different vector lengths, SVE2 can reduce the cost of cross-platform support by sharing code. Removing the requirement to rebuild binaries allows software to be ported more easily. The scalability and portability of the binaries means that developers do not have to know and care about the vector length for their target devices. This particular benefit of SVE2 is more effective when the software is shared across platforms or used over an extended period of time.

# 四種使用SVE2的方法
How to use SVE2
So, how can you make the most of SVE2? There are several ways to write or generate SVE2 code:
1) A library that uses SVE2
2) SVE2-enabled Compiler
3) SVE2 Intrinsics in C/C++
4) SVE2 Assembly
https://community.arm.com/arm-commu...blog/posts/sve2

# Arm合作夥伴可在 128∼2048位元之間且以 128位為增量去設計向量長度
《轉貼》Introducing SVE2
SVE2 is a superset of SVE and Neon. SVE2 allows for more function domains in data-level parallelism. SVE2 inherits the concept, vector registers, and operation principles of SVE. SVE and SVE2 define 32 scalable vector registers. Silicon partners can choose a suitable vector length design implementation for hardware that varies between 128 bits and 2048 bits, at 128-bit increments. The advantage of SVE and SVE2 is that only one vector instruction set uses the scalable variables.

# SVE2讓開發人員編寫和構建一次程式，就能用在不同AArch64硬體之上。
The SVE design concept enables developers to write and build software once, then run the same binaries on different AArch64 hardware with various SVE vector length implementations. The portability of the binaries means that developers do not have to know the vector length implementation for their system. Removing the requirement to rebuild binaries allows software to be ported more easily.

# SVE2 指令集還可以加速以下應用
The main difference between SVE2 and SVE is the functional coverage of the instruction set. SVE was designed for HPC and ML applications. SVE2 extends the SVE instruction set to enable data-processing domains beyond HPC and ML. The SVE2 instruction set can also accelerate the common algorithms that are used in the following applications:
Computer vision
Multimedia
Long-Term Evolution (LTE) baseband processing
Genomics
In-memory database
Web serving
General-purpose software
https://developer.arm.com/documenta...ntroducing-SVE2